1. Field of the Invention
The present invention is related to the field of integrated circuits and surface mount technology. More specifically, the present invention is directed to an assembly aid for facilitating the surface-mounting of ball grid array (BGA) integrated circuit (IC) devices to printed circuit boards (PCBs), chip carriers, or similar components using reflow solder methods.
2. Description of Related Technology
Surface mount technology (SMT) is increasingly being employed as a cost-effective means of mounting IC devices to printed circuit boards. Numerous different techniques for mounting integrated circuit devices to circuit boards, chip carriers, or other components fall within the general category of SMT. Of these techniques, area array (as opposed to perimeter array) technology is often used to mount high I/O density packages with a great degree of reliability and manufacturing efficiency. Area array techniques include the use of pin grid arrays (PGAs), column grid arrays (CGAs), and ball grid arrays (BGAs). The more recent BGA and CGA techniques provide substantial improvements over PGA methods in that higher densities, reliability, and efficiency can be obtained for many types of packages.
As the name implies, ball grid arrays (BGAs) utilize a grid or array of electrical terminals, such as solder bumps or balls arranged on one side of the IC package to effectuate electrical contact with the circuit board. The solder bumps of the array may vary in material, size (height and width) and pitch (i.e., bump-to-bump spacing) based on the individual package. Standard bump heights may range from less than one to several millimeters. Standard pitches in common use are 1.00, 1.27, and 1.50 mm (PBGA and CBGA) and 0.5 mm (MBGA). Additionally, the solder bumps may be arranged in a uniform or non-uniform array pattern, with some leads removed in certain areas, which is referred to as "depopulation," depending on the desired attributes of the package. Solder bumps or balls are typically attached to the board or module using a eutectic solder with a lower melting point than that of the solder balls of the array, thereby allowing removal and rework without damage to the components.
The preferred substrate attachment site or land pattern geometry for use in BGA packages is usually circular or rectangular with the dimensions adjusted to meet ball size and pitch requirements. The lands or pads may also be recessed into the circuit board. A large number of different attachment schemes and pad geometries have been devised for use in such applications, the properties of which are well understood in the surface mount field.
Common BGA package configurations include ceramic (CBGA) and plastic (PBGA), as well as micro-BGA (MBGA). Each of these types of packages has its own attributes, which are also well understood in the field of SMT. Package outline specifications are presented in industry standards such as the joint industry council JEDEC Publication 1995. In addition to individual IC devices, multi-chip modules or chip carriers can also be effectively surface mounted using area array techniques.
FIG. 1 depicts a typical prior art surface mount of a BGA IC device 200 on a printed circuit board 202, showing the solder joints 203 formed between the terminals 311 of the BGA and the PCB lands 220.
BGA packages are typically mounted to the desired substrate or component using reflow solder processing techniques. Reflow soldering processes generally use forced convection heating (air or nitrogen) to melt and reflow solder beads or paste interposed between the surfaces to be joined. A paste, ball or other form of solder such as Pb/Sn, Pb/Sn/Ag or similar composition, depending on the desired attributes, is set between the BGA ball leads and the etched land or pad of the PCB or chip carrier and exposed to a temperature profile which results in reflow of the solder. Surface tension created in the resulting solder liquid mass during reflow tends to prevent collapse of the solder, causing the joint to eventually solidify in a barrel or truncated sphere shape that is commonly referred to as a Controlled Collapse Chip Connection, or "C-4". Numerous variations on this general theme exist, including the use of two or more different solders with various melting points to produce reflow of various portions of the joint during different processes, or to allow rework.
In one type of reflow process, pre-tinned leads of an IC device are attached to a substrate etched to receive these leads. A solder paste stencil having apertures that are the same or nearly the same size as the etched pads (lands) on the PCB is aligned on the substrate; solder paste is applied to the unmasked areas, and the stencil is subsequently removed. The IC device is then placed such that the leads contact the paste on the etched pads, and the entire assembly is passed through a reflow processing oven which applies a predetermined time/temperature profile to the solder paste and tinning to liquify these substances and form a solder joint between the lead and the substrate pad.
Land areas may be determined by solder masking, etching, or other methods. In the commonly used technique of solder masking depicted in FIG. 2, the paste 300 may be applied through a solder mask 205 which is later removed so that the solder matches the shape and size of the pad 220 ("mask free"), or with somewhat more restricted dimensions so that the paste 300 does not cover the entire area of the pad ("mask defined"). Mask-free patterns tend to promote a uniform tapered column profile, while the mask-defined areas tend to promote controlled collapse (C-4) profiles during reflow. As shown in FIG. 2, the deposition of solder paste on the circuit board land pad 220 is not always uniform or conducive to proper alignment of the ball terminal with respect to the land.
In addition to the reflow method described above, IC devices may also be surface mounted using deposition of solid solder elements. In this process, the solidified solder elements are placed in position on the substrate pads, with the small amount of solder flux resident on the element used to adhere the element to the substrate. The IC device is then placed with its terminals in contact with the solder elements, and the assembly is exposed to an appropriate reflow time-temperature profile to form the solder joints. This method has the advantage of obviating the masking and solder paste application process described above; however, it requires the precise placement of the solid solder elements in relation to the pads and, ultimately, the IC device leads.
Various methods of applying and forming solder paste or solidified elements on the substrate have been devised. For example, U.S. Pat. No. 5,403,671 discloses a method of forming desirable solder shapes on individual contact pads of the PCB using a permanent mask and wire mesh compressed onto the solder during heating. This approach has the drawbacks of requiring the use and placement of the mask and wire mesh, as well as requiring extra processing steps related to the heating and compression of the assembly.
U.S. Pat. No. 5,051,339 discloses a method by which a PCB is masked and laminated with a temporary photoimageable layer prior to immersion in a pool of molten solder. A closure element is used following the immersion to flatten the solder into the pad areas during cooling, thereby forming solder "pillars" in the unmasked pad regions. This technique suffers from several drawbacks, including the difficulty of stripping the temporary layer from the substrate after pillar formation, and the physical instability of the pillars during component mating. Additionally, the technique does not lend itself to component rework, particularly when other components (i.e., other than the component being reworked) may already be mounted to the circuit board.
U.S. Pat. No. 5,442,852 discloses a method of fabricating a high density array of solder balls by perforating a thin sheet of dielectric material to create a aperture grid or array. The dielectric sheet is than mated to the substrate, with the lands or pads coinciding with the apertures. Spherical solder balls are placed in each of the apertures, and the assembly is then heated such that the balls reflow into the apertures and bond to the pads on the substrate. A substantially spherical portion of the ball remains above the aperture due to the effects of surface tension. The resulting ball/substrate array can then be used to mate the substrate to another substrate. This invention does not provide for facilitating the mounting of an IC device have a preexisting terminal array to a substrate, but rather is designed for forming of the terminal (ball grid) array itself. Additionally, no means of alignment of the sheet with relation to the PCB or IC device is provided.
IC devices and PCBs may have some degree of non-planarity or "warpage" as a result of the manufacturing process and/or storage prior to surface mounting. CBGA packages are generally less susceptible to warping of the package itself as compared to PBGA packages; however, PBGA packages offer inherent advantages in terms of manufacturing cost, making their use desirable in many applications. Additionally, the printed circuit board and/or IC device may undergo some degree of warpage due to mechanical stresses resulting from thermal expansion during heatup, cooldown, or normal operation. As the components warp, varying degrees of stress may be placed on the solder joints of the BGA. In extreme cases, such stresses may result in the failure of one or more solder joints, or more typically, failure to form one or more joints during reflow processing.
One method of compensating for such warpage is disclosed in U.S. Pat. No. 5,435,482 which teaches planarizing the ball grid terminal array associated with BGA devices such as PBGAs, which are susceptible to warpage during manufacture and processing. This patent discloses the use of a number of solder balls of different shapes and diameters which are then planarized by pressing the substrate to which the balls are attached to a platen, which may be heated to deform the solder balls as necessary to make uniform contact with the platen. This process in effect provides a more planar BGA package, and is completed prior to positioning and reflow processing. However, the process requires specialized equipment, such as a vacuum chuck for holding the packages, specialized processes for the manufacture and use of non-uniform solder balls, and at least one extra processing step prior to reflow.
During the reflow soldering process, the alignment of the IC device is critical to the acceptability and longevity of the solder joints between the components to be joined. Furthermore, if excessive normal force is applied, the quality of the resulting reflow solder joints may be affected, producing a condition referred to as "squashing". As previously discussed, surface tension of the liquid solder produces a resilient force and helps maintain the integrity of the joint. If the normal force is excessive, one or more joints may collapse thereby resulting in unwanted wetting of adjacent features, solder shorts, balls, or other undesirable side-effects. See "A Model for Deformation of Solder Bumps From Ramp Loading" by L. Goldmann, Journal of Electronic Packaging, March 1996. incorporated herein by reference. Similarly, if the device is pitched at an angle to the board during reflow processing, the joints on a portion of the array may collapse, whereas those on other portions of the array may not form.
BGA devices used in surface mount applications can be somewhat self centering; see for example "Determination of Optimal Solder Volume for Precision Self-Alignment of BGA Using Flip Chip Bonding" by P. Nasiatka and Z. Karim, Proceedings of the 1995 IEEE Hong Kong Electron Devices Meeting. This property results from a number of factors including the surface tension generated during reflow, and lateral forces generated by the array leads or balls fitting into the terminal pads, which often have a somewhat concave or hemispherical shape to receive the leads. However, due to other factors such as misalignment during placement, equipment vibration, variations in solder ball volume and dimensions, thermal gradients, and human error, the device being mounted is often not in the desired alignment when reflow processing is begun, and such self-centering forces are insufficient to cause realignment. Furthermore, some processes such as solder masking may produce solder paste shapes which are amenable to easy positioning prior to reflow, thereby potentially reducing surface tension restoring forces.
Based on the comparatively small pitches in use with presently existing BGA/MBGA packages, slight misalignment of the device during reflow processing can result in joint defects including voids, solder shorts, or even failure to form a joint. Such defects can produce high electrical resistance or shorts, as well as reduced component or joint longevity, thereby ultimately requiring rework of the component. Proper alignment during reflow processing is therefore critical to high manufacturing efficiency.
Rework processing is another consideration when using BGA devices in SMT applications. If the numerous joints of the BGA package do not form properly during the initial reflow process, the package must be removed and remounted to the PCB. When other devices are already mounted to the board, remasking, pasting, and resoldering using existing SMT methodologies is often impractical or unfeasible. In some such situations, the BGA package is removed from the board and the board is discarded rather than reworked, thereby contributing to increased manufacturing cost and processing time.
A similar consideration relates to BGA package mounting and reworking during PCB design. During the design phase, the layout of many circuit boards (i.e., the placement of components on the board) is often not well established and subject to frequent change. Relocation of a given BGA package is potentially problematic using existing technology for the reasons described above. Note that BGA packages do not lend themselves to the use of sockets and receptacles, thereby making surface mounting of the package a virtual necessity. Hence, "prototyping" of circuit boards using BGA packages would be substantially simplified if the package(s) could be readily removed and remounted without the need to rework the entire board.
Based on the foregoing, it would be most desirable to provide an improved apparatus and method for mounting one or more integrated circuit devices on a printed circuit board or other component which would overcome the limitations of existing surface mount and reflow soldering technology by improving the efficiency and reliability with which such assemblies could be manufactured while also facilitating rework and prototyping. Such an improved method would i) provide for more rapid and accurate orientation and placement of the IC device with respect to the substrate prior to reflow soldering; ii) reduce the number and/or complexity of processing steps necessary to prepare the assembly for reflow processing; iii) facilitate maintaining proper relative alignment of the package and substrate during actual reflow processing to enhance joint formation; and iv) permit easy rework of one or more IC devices mounted in proximity to other devices.